Being Correct Is Not Enough: Efficient Verification Using Robust Linear Temporal Logic

While most approaches in formal methods address system correctness, ensuring robustness has remained a challenge. In this paper we present and study the logic rLTL which provides means to formally reason about both correctness design. Furthermore, identify large fragment of for verification problem can be efficiently solved, i.e., done by using an automaton, recognizing behaviors described formula $\varphi$, size at $\mathcal{O} \left( 3^{ |\varphi|} \right)$, where $|\varphi|$ is length $\varphi$. This result improves upon previously known bound $\mathcal{O}\left(5^{|\varphi|} \right)$ closer LTL $\mathcal{O}\left( 2^{|\varphi|} \right)$. The usefulness demonstrated number case studies showing its practical significance terms expressiveness, ability describe robustness, fine-grained information that brings process verification. Moreover, these advantages come low computational overhead with respect